Thesis Abstract and Dissertation Abstracts

Multiwavelet transform (MWT)

Thesis Abstract by Alaa M. Daham Al-Tai from Date Submitted: Mar 26, 2007, 03:52

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Telecommunication, University of Technology, 2005

Disseration Keywords: FPGA, Multiwavelet transform

This Thesis Abstract | Dissertation Abstract may be cited as follows:

Thesis Abstract or Dissertation Abstract (Summary):
Applications based on Multiwavelet transform (MWT) such as signal and image processing require high computational power, plus the ability to experiment with algorithms. Reconfigurable hardware devices in the form of Filed Programmable Gate Arrays (FPGAs) have been proposed as a way of obtaining high performance at low price. However, users must program FPGAs at a very low level and have a detailed knowledge of the architecture of the device being used.

In this thesis the Multiwavelet transform computational methods are explained and some examples solved for explanation. Some method of computation of Multiwavelet are proposed, GHM Multiwavelet transform, chui-lian, cardinal balanced, and matrix approximation methods are then investigate.

Due to the versatility and accuracy of the GHM Multiwavelet transform, it is used and studied in detail. The repeated row processing and the critically sampled methods type of GHM are then investigated in one and two-dimensional cases for the two-stage, decomposition and reconstruction. They are compared through solving some examples using MatLab ver. 6.5. It is shown that the repeated row processing method gives more accurate result for the reconstruction phase than critically sampled method. The main drawback of such method is the decomposition Multiwavelet transform matrix which will be doubled, and one always searches for reducing the computation to reduce the complexity of the design. The selection of which method to be applied depends mainly on the application type.

The implementation of the Multiwavelet transform in a Spartan-II FPGA kit is done using the ISE (Integrated Software Environment) Xilinx Foundation series 2.1 in the design. The circuit designs adopted are given. Two FPGA circuits are designed, one for relatively high performance, high cost and another for relatively low cost, low performance. The evaluation of the results is also given.

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